http://13.232.72.61:8080/jspui/handle/123456789/962 2026-04-03T18:17:46Z http://13.232.72.61:8080/jspui/handle/123456789/994 Title: Translation based Face Recognition using Fusion of LL and SV Coefficients Authors: Sujathaa, B. M.; Venukumar, B. V.; Madiwalar, Chetan Tippanna; Munna, N. C. Abidali; Babu, K. Suresh; Raja, K. B.; Venugopal, K. R. Abstract: The face is a physiological trait used to identify a person effectively for various biometric applications. In this paper we propose Translation based Face Recognition using Fusion of LL and SV coefficients. The novel concept of translating many sample images of a single person into one sample per person is introduced. The face database images are preprocessed using Gaussian filter and DWT to generate LL coefficients. The support vectors (SV) are obtained from support vector machine (SVM) for LL coefficients. The LL and SVs are fused using arithmetic addition to generate final features. The face database and test face image features are compared using Euclidean Distance (ED) to compute the performance parameters. 2016-01-01T00:00:00Z http://13.232.72.61:8080/jspui/handle/123456789/991 Title: Performance analysis of HWMP protocol for wireless mesh networks using NS3 Authors: Nataraju, A. B.; Maheshappa, H. D.; Devkatte, A. Abstract: Wireless mesh network (WMN) deployments are popular as a cost-effective means to provide broadband connectivity to large population. With the increase in network usage, network planners need to enhance the existing mesh network to provide additional capacity. IEEE 802.11s [2J is the de facto standard for WMN implementations. This standard defines two new protocols namely Hybrid Wireless Mesh Protocol (HWMP) and Peer management protocol (PMP) to support wireless meshing functionality. HWMP protocol provides the Layer-2 routing functionality while PMP helps in maintaining the links between mesh points. This work analyzes the performance of HWMP protocol with varied grid size, packet size, and number of radio interfaces. It is observed that HWMP protocol perform well with more number of radios and larger grid size as long as the packet size is less than or equal to 2K bytes. The performance degrades drastically beyond packet size of 2K bytes and is not suitable to operate with larger packet sizes. 2016-11-01T00:00:00Z http://13.232.72.61:8080/jspui/handle/123456789/990 Title: Optimized Face Recognition Algorithm using Spatial and Transform Domain Techniques Authors: Sujatha, B. M.; Suresh Babu, K.; Raja, K. B.; Venugopal, K. R. Abstract: The biometrics is used to identify or verify persons effectively in the real time scenario. In this paper, we propose Optimized Face Recognition Algorithm using Spatial and Transform Domain Techniques. The face images are preprocessed using Discrete Wavelet Transform (DWT), resize and fIltering. The Compound Local Binary Pattern (CLBP) is used to generate magnitude and sign components from preprocessed face images. The histogram is applied on sign and magnitude components of CLBP to compress number of features. The generated histogram features are concatenated to form CLBP-Histogram features. The Fast Fourier Transformation (FFT) is applied on preprocessed image and FFT magnitude features are generated. The CLBP-Histogram features are fused with FFT magnitude features to generate final feature set. The final feature sets of test image and data base images are compared using Euclidian Distance (ED) to recognise a person. It is observed that the performance parameter of the proposed algorithm is better compared to existing algorithms. 2015-12-01T00:00:00Z http://13.232.72.61:8080/jspui/handle/123456789/989 Title: Fault Tolerant Techniques for FPGAs: A Review Authors: Raghunath, B. H.; Aravind, H. S. Abstract: Field-Programmable Gate Arrays (FPGAs) have emerged as best option for d i g i t a l circuit implementation over the last few decades. FPGAs have the ability to reconfigure at runtime; therefore provide opportunities to overcome issues like reliability and availability which are the serious issues in safety critical applications. This review attempts to investigate some of popular methods in fault detection and also gives an overview of partial reconfiguration technique in FPGA based systems. 2017-07-01T00:00:00Z