Please use this identifier to cite or link to this item: http://13.232.72.61:8080/jspui/handle/123456789/291
Title: A Survey on Various Parallel Power Aware Task Scheduling Algorithms for Reducing Power Consumption
Authors: Shruthi, S.
Nagaveni, V.
Keywords: Computer science
Computer terminals
Issue Date: Apr-2014
Publisher: IJRITCC
Citation: Shruthi, S., & Nagaveni, V. (2014). A Survey on Various Parallel Power Aware Task Scheduling Algorithms for Reducing Power Consumption. International Journal on Recent and Innovation Trends in Computing and Communication, 2(4), 911-914.
Abstract: A recent issue in computing systems is Power aware scheduling problem. The Scheduling problem reduces the system reliability and availability and increases the operational cost. As recent commodity processors support multiple operating points under various supply voltage levels, Dynamic voltage and frequency scaling (DVFS) is a commonly used power Aware Management technique that can reduce power consumption by decreasing the clock frequency of a processor it leads to reduction in the supply voltage and it saves power on a wide range of computing systems. In this paper, we provide three different power aware scheduling algorithms to minimize power consumption of parallel task. The three algorithms are Power Aware List Scheduling (PALS), Power Aware Task clustering (PATC) and Low Energy Scheduling (LEneS) algorithms. Using these algorithms we can achive maximum energy saving.
URI: http://13.232.72.61:8080/jspui/handle/123456789/291
ISSN: 2321-8169
Appears in Collections:Articles



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.