Please use this identifier to cite or link to this item: http://13.232.72.61:8080/jspui/handle/123456789/989
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dc.contributor.authorRaghunath, B. H.-
dc.contributor.authorAravind, H. S.-
dc.date.accessioned2019-02-23T07:14:31Z-
dc.date.available2019-02-23T07:14:31Z-
dc.date.issued2017-07-
dc.identifier.citationRaghunath, B. H., & Aravind, H. S. (2017). Fault Tolerant Techniques for FPGAs: A Review. Kumar, M. et al.(Ed.), Int. Conf. on Signal, Image Processing Communication & Automation, ICSIPCA(pp. 415-418). Grenze Scientific Society: Bengaluru, India.en_US
dc.identifier.isbn9781510856707-
dc.identifier.urihttp://13.232.72.61:8080/jspui/handle/123456789/989-
dc.description.abstractField-Programmable Gate Arrays (FPGAs) have emerged as best option for d i g i t a l circuit implementation over the last few decades. FPGAs have the ability to reconfigure at runtime; therefore provide opportunities to overcome issues like reliability and availability which are the serious issues in safety critical applications. This review attempts to investigate some of popular methods in fault detection and also gives an overview of partial reconfiguration technique in FPGA based systems.en_US
dc.language.isoenen_US
dc.publisherGrenze Scientific Societyen_US
dc.subjectElectronics Engineeringen_US
dc.subjectCommunicationen_US
dc.subjectLook Up Tableen_US
dc.subjectApplication Specific Integrated Circuitsen_US
dc.titleFault Tolerant Techniques for FPGAs: A Reviewen_US
dc.typeOtheren_US
Appears in Collections:Conference Proceedings

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